NXP Semiconductors /LPC43xx /EVENTROUTER /SET_EN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SET_EN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WAKEUP0_SETEN)WAKEUP0_SETEN 0 (WAKEUP1_SETEN)WAKEUP1_SETEN 0 (WAKEUP2_SETEN)WAKEUP2_SETEN 0 (WAKEUP3_SETEN)WAKEUP3_SETEN 0 (ATIMER_SETEN)ATIMER_SETEN 0 (RTC_SETEN)RTC_SETEN 0 (BOD_SETEN)BOD_SETEN 0 (WWDT_SETEN)WWDT_SETEN 0 (ETH_SETEN)ETH_SETEN 0 (USB0_SETEN)USB0_SETEN 0 (USB1_SETEN)USB1_SETEN 0 (SDMMC_SETEN)SDMMC_SETEN 0 (CAN_SETEN)CAN_SETEN 0 (TIM2_SETEN)TIM2_SETEN 0 (TIM6_SETEN)TIM6_SETEN 0 (QEI_SETEN)QEI_SETEN 0 (TIM14_SETEN)TIM14_SETEN 0RESERVED 0 (RESET_SETEN)RESET_SETEN 0 (BODRESET_SETEN)BODRESET_SETEN 0 (DPDRESET_SETEN)DPDRESET_SETEN 0RESERVED

Description

Set event enable register

Fields

WAKEUP0_SETEN

Writing a 1 to this bit sets the event enable bit 0 in the ENABLE register.

WAKEUP1_SETEN

Writing a 1 to this bit sets the event enable bit 1 in the ENABLE register.

WAKEUP2_SETEN

Writing a 1 to this bit sets the event enable bit 2 in the ENABLE register.

WAKEUP3_SETEN

Writing a 1 to this bit sets the event enable bit 3 in the ENABLE register.

ATIMER_SETEN

Writing a 1 to this bit sets the event enable bit 4 in the ENABLE register.

RTC_SETEN

Writing a 1 to this bit sets the event enable bit 5 in the ENABLE register.

BOD_SETEN

Writing a 1 to this bit sets the event enable bit 6 in the ENABLE register.

WWDT_SETEN

Writing a 1 to this bit sets the event enable bit 7 in the ENABLE register.

ETH_SETEN

Writing a 1 to this bit sets the event enable bit 8 in the ENABLE register.

USB0_SETEN

Writing a 1 to this bit sets the event enable bit 9 in the ENABLE register.

USB1_SETEN

Writing a 1 to this bit sets the event enable bit 10 in the ENABLE register.

SDMMC_SETEN

Writing a 1 to this bit sets the event enable bit 11 in the ENABLE register.

CAN_SETEN

Writing a 1 to this bit sets the event enable bit 12 in the ENABLE register.

TIM2_SETEN

Writing a 1 to this bit sets the event enable bit 13 in the ENABLE register.

TIM6_SETEN

Writing a 1 to this bit sets the event enable bit 14 in the ENABLE register.

QEI_SETEN

Writing a 1 to this bit sets the event enable bit 15 in the ENABLE register.

TIM14_SETEN

Writing a 1 to this bit sets the event enable bit 16 in the ENABLE register.

RESERVED

Reserved.

RESET_SETEN

Writing a 1 to this bit sets the event enable bit 19 in the ENABLE register.

BODRESET_SETEN

Writing a 1 to this bit sets the event enable bit 20 in the ENABLE register.

DPDRESET_SETEN

Writing a 1 to this bit sets the event enable bit 21 in the ENABLE register.

RESERVED

Reserved.

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